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cs3031_2026T2_ET_FN.pdf

Computer Systems Design · End Term · May 2026 FN

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Questions and published explanations below are available without starting a test. Some questions may not have a published solution yet.

Question 2 MCQ · 1.0 marks

In a 4-bit system, the one’s complement of the binary number 1000 is 1011.
  1. True
  2. False

A published solution is not available for this question yet.

Question 3 MCQ · 1.0 marks

A synchronous counter triggers all flipflops using a common clock signal, while an asynchronous counter triggers each flipflop using the output of the previous flipflop.
  1. True
  2. False

A published solution is not available for this question yet.

Question 4 MCQ · 1.0 marks

In a system with 65 unique states, 6 flipflops are sufficient to represent all the states.
  1. True
  2. False

A published solution is not available for this question yet.

Question 5 MCQ · 1.0 marks

In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.
  1. True
  2. False

A published solution is not available for this question yet.

Question 6 MCQ · 1.0 marks

According to Moore’s law, if a computer system has 2 million transistors today, then it will have approximately 32 million transistors in 4 years.
  1. True
  2. False

A published solution is not available for this question yet.

Question 7 MCQ · 3.0 marks

The given truth table has to be realized with D flipflop as shown below. [[IMAGE:e927350646237569_3_2]] [[IMAGE:e927350646237569_3_3]] What is the equation for **Logic** in terms of A, B, [[IMAGE:e927350646237569_4_4]] ?
Source diagram or notationSource diagram or notationSource diagram or notation
  1. [[IMAGE:e927350646237569_4_5]]
    Source diagram or notation
  2. [[IMAGE:e927350646237569_4_6]]
    Source diagram or notation
  3. [[IMAGE:e927350646237569_4_7]]
    Source diagram or notation
  4. [[IMAGE:e927350646237569_4_8]]
    Source diagram or notation
  5. None of these

A published solution is not available for this question yet.

Question 8 NAT · 3.0 marks

What is the minimum number of 2 input NOR gates required to design a circuit that implements the function [[IMAGE:e927350646237569_4_9]] .
Source diagram or notation

    A published solution is not available for this question yet.

    Question 9 NAT · 3.0 marks

    A 4-to-2 priority encoder has gates inputs [[IMAGE:e927350646237569_4_10]] and [[IMAGE:e927350646237569_4_11]] where [[IMAGE:e927350646237569_4_12]] has the highest priority and [[IMAGE:e927350646237569_4_13]] has the lowest priority. The output logic equations are given by [[IMAGE:e927350646237569_5_14]] and [[IMAGE:e927350646237569_5_15]] What is the output [[IMAGE:e927350646237569_5_16]] when the input vector [[IMAGE:e927350646237569_5_17]] ? Note: Enter the answer as a two-bit binary value. For example, if the answer is (0, 0), enter it as 00.
    Source diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notation

      A published solution is not available for this question yet.

      Question 10 NAT · 3.0 marks

      A 1-bit comparator takes two input bits, A and B, and outputs **1** if A = B and **0** otherwise. Using only 2-input **NOR** gates, what is the minimum number of gates required to design such a comparator circuit?

        A published solution is not available for this question yet.

        Question 11 NAT · 3.0 marks

        We want to implement A ⊙ B (A XNOR B) using 2:1 multiplexers. What is the minimum number of 2:1 multiplexers required?

          A published solution is not available for this question yet.

          Question 12 NAT · 3.0 marks

          A circuit has four inputs: A, B, C, D and one output F. The output F is logic 1 if and only if exactly two of the four inputs are 0. In all other cases, the output is 0. What is the minimum number of minterms in the Sum of Products (SOP) expression for F?

            A published solution is not available for this question yet.

            Question 13 NAT · 3.0 marks

            Consider the circuit consisting of two D flipflops and one XNOR gate as shown below. The initial states are [[IMAGE:e927350646237569_6_18]] = 0, [[IMAGE:e927350646237569_6_19]] = 0, What is the number of possible states for the circuit? [[IMAGE:e927350646237569_6_20]]
            Source diagram or notationSource diagram or notationSource diagram or notation

              A published solution is not available for this question yet.

              Question 14 NAT · 3.0 marks

              Consider a mod-14 up counter with an initial state of 0011. What will be the state of the counter after 25 clock pulses?

                A published solution is not available for this question yet.

                Question 15 NAT · 3.0 marks

                Consider the circuit diagram using J-K flipflop as shown below. Assuming it was initially cleared to 0, state the output Y for the next 5 clock pulses. [[IMAGE:e927350646237569_7_21]] Note: Do not write initial state as part of the answer. Your answer should be in the form: [[IMAGE:e927350646237569_7_22]]
                Source diagram or notationSource diagram or notation

                  A published solution is not available for this question yet.

                  Question 16 NAT · 3.0 marks

                  Consider a 10-bit Johnson counter. What is the total number of unique states it can cycle through?

                    A published solution is not available for this question yet.

                    Question 17 SHORT_TEXT · 3.0 marks

                    Consider a common bus architecture comprising of memory, and registers X, Y, Z. The control word format is given below. [[IMAGE:e927350646237569_8_23]] What would be the control word if you intend to perform a register transfer from register X to register Z? Note: Enter the value in hexadecimal format (e.g. 0x24).
                    Source diagram or notation

                      A published solution is not available for this question yet.

                      Question 18 NAT · 3.0 marks

                      A processor contains 256 registers in its register file. The ALU of the processor supports 8 operations: addition, subtraction, multiplication, division, AND, OR, XOR, and NOR. What is the minimum number of bits required by an instruction to perform a subtraction operation between two operands stored in the register file, and store the result in a third register?

                        A published solution is not available for this question yet.

                        Question 19 NAT · 3.0 marks

                        Consider the control word given below. [[IMAGE:e927350646237569_9_24]] What is the maximum number of registers that can be stored in the instruction file?
                        Source diagram or notation

                          A published solution is not available for this question yet.

                          Question 20 SHORT_TEXT · 3.0 marks

                          Suppose we want to execute a data movement instruction, where we move the data present in register [[IMAGE:e927350646237569_9_25]] to register [[IMAGE:e927350646237569_9_26]] . **Instruction:** [[IMAGE:e927350646237569_9_27]] [[IMAGE:e927350646237569_9_28]] [[IMAGE:e927350646237569_9_29]] Destination register, [[IMAGE:e927350646237569_9_30]] Source register Operands: 0 [[IMAGE:e927350646237569_9_31]] d [[IMAGE:e927350646237569_9_32]] 31, 0 [[IMAGE:e927350646237569_9_33]] r [[IMAGE:e927350646237569_9_34]] 31 **Instruction Format:** [[IMAGE:e927350646237569_10_35]] What will be the hexadecimal machine code for the instruction? Note: Enter the value in hexadecimal format (e.g., 0x2438).
                          Source diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notationSource diagram or notation

                            A published solution is not available for this question yet.

                            Question 21 NAT · 3.0 marks

                            Perform 2’s complement subtraction of two numbers A = 22 and B = 47. What is the result of A − B in 8-bit binary format? (Note: Don’t use sign-magnitude form.)

                              A published solution is not available for this question yet.